package x86

Import Path
	github.com/segmentio/asm/cpu/x86 (on go.dev)

Dependency Relation
	imports 2 packages, and imported by 2 packages

Involved Source Files

	    x86.go
Package-Level Type Names (total 2, both are exported)

	/* sort exporteds by: alphabet | popularity */
	 type CPU cpuid.CPU (basic type)

		Methods (total 2, in which 1 is exported)
			( CPU) Has(feature Feature) bool
			/* one unexported ... *//* one unexported: */
			(*CPU) set(feature Feature, enable bool)
		As Outputs Of (at least one exported)
			func ABI() CPU
		As Types Of (only one, which is exported)
			  var github.com/segmentio/asm/cpu.X86

	 type Feature cpuid.Feature (basic type)

		As Inputs Of (at least 2, in which 1 is exported)
			func CPU.Has(feature Feature) bool
			/* at least one unexported ... *//* at least one unexported: */
			func (*CPU).set(feature Feature, enable bool)
		As Types Of (total 25, all are exported)
			const AVX
			const AVX2
			const AVX512BF16
			const AVX512BITALG
			const AVX512BW
			const AVX512CD
			const AVX512DQ
			const AVX512ER
			const AVX512F
			const AVX512IFMA
			const AVX512PF
			const AVX512VBMI
			const AVX512VBMI2
			const AVX512VL
			const AVX512VNNI
			const AVX512VP2INTERSECT
			const AVX512VPOPCNTDQ
			const CMOV
			const SSE
			const SSE2
			const SSE3
			const SSE41
			const SSE42
			const SSE4A
			const SSSE3


Package-Level Functions (only one, which is exported)

	 func ABI() CPU
Package-Level Constants (total 25, all are exported)

	const AVX Feature = 128 // AVX functions
	const AVX2 Feature = 256 // AVX2 functions
	const AVX512BF16 Feature = 512 // AVX-512 BFLOAT16 Instructions
	const AVX512BITALG Feature = 1024 // AVX-512 Bit Algorithms
	const AVX512BW Feature = 2048 // AVX-512 Byte and Word Instructions
	const AVX512CD Feature = 4096 // AVX-512 Conflict Detection Instructions
	const AVX512DQ Feature = 8192 // AVX-512 Doubleword and Quadword Instructions
	const AVX512ER Feature = 16384 // AVX-512 Exponential and Reciprocal Instructions
	const AVX512F Feature = 32768 // AVX-512 Foundation
	const AVX512IFMA Feature = 65536 // AVX-512 Integer Fused Multiply-Add Instructions
	const AVX512PF Feature = 131072 // AVX-512 Prefetch Instructions
	const AVX512VBMI Feature = 262144 // AVX-512 Vector Bit Manipulation Instructions
	const AVX512VBMI2 Feature = 524288 // AVX-512 Vector Bit Manipulation Instructions, Version 2
	const AVX512VL Feature = 1048576 // AVX-512 Vector Length Extensions
	const AVX512VNNI Feature = 2097152 // AVX-512 Vector Neural Network Instructions
	const AVX512VP2INTERSECT Feature = 4194304 // AVX-512 Intersect for D/Q
	const AVX512VPOPCNTDQ Feature = 8388608 // AVX-512 Vector Population Count Doubleword and Quadword
	const CMOV Feature = 16777216 // Conditional move
	const SSE Feature = 1 // SSE functions
	const SSE2 Feature = 2 // P4 SSE functions
	const SSE3 Feature = 4 // Prescott SSE3 functions
	const SSE41 Feature = 8 // Penryn SSE4.1 functions
	const SSE42 Feature = 16 // Nehalem SSE4.2 functions
	const SSE4A Feature = 32 // AMD Barcelona microarchitecture SSE4a instructions
	const SSSE3 Feature = 64 // Conroe SSSE3 functions

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