package arm

import (
	
	. 
)

type CPU cpuid.CPU

func ( CPU) ( Feature) bool {
	return cpuid.CPU().Has(cpuid.Feature())
}

func ( *CPU) ( Feature,  bool) {
	(*cpuid.CPU)().Set(cpuid.Feature(), )
}

type Feature cpuid.Feature

const (
	SWP      Feature = 1 << iota // SWP instruction support
	HALF                         // Half-word load and store support
	THUMB                        // ARM Thumb instruction set
	BIT26                        // Address space limited to 26-bits
	FASTMUL                      // 32-bit operand, 64-bit result multiplication support
	FPA                          // Floating point arithmetic support
	VFP                          // Vector floating point support
	EDSP                         // DSP Extensions support
	JAVA                         // Java instruction set
	IWMMXT                       // Intel Wireless MMX technology support
	CRUNCH                       // MaverickCrunch context switching and handling
	THUMBEE                      // Thumb EE instruction set
	NEON                         // NEON instruction set
	VFPv3                        // Vector floating point version 3 support
	VFPv3D16                     // Vector floating point version 3 D8-D15
	TLS                          // Thread local storage support
	VFPv4                        // Vector floating point version 4 support
	IDIVA                        // Integer divide instruction support in ARM mode
	IDIVT                        // Integer divide instruction support in Thumb mode
	VFPD32                       // Vector floating point version 3 D15-D31
	LPAE                         // Large Physical Address Extensions
	EVTSTRM                      // Event stream support
	AES                          // AES hardware implementation
	PMULL                        // Polynomial multiplication instruction set
	SHA1                         // SHA1 hardware implementation
	SHA2                         // SHA2 hardware implementation
	CRC32                        // CRC32 hardware implementation
)

func () CPU {
	 := CPU(0)
	.set(SWP, ARM.HasSWP)
	.set(HALF, ARM.HasHALF)
	.set(THUMB, ARM.HasTHUMB)
	.set(BIT26, ARM.Has26BIT)
	.set(FASTMUL, ARM.HasFASTMUL)
	.set(FPA, ARM.HasFPA)
	.set(VFP, ARM.HasVFP)
	.set(EDSP, ARM.HasEDSP)
	.set(JAVA, ARM.HasJAVA)
	.set(IWMMXT, ARM.HasIWMMXT)
	.set(CRUNCH, ARM.HasCRUNCH)
	.set(THUMBEE, ARM.HasTHUMBEE)
	.set(NEON, ARM.HasNEON)
	.set(VFPv3, ARM.HasVFPv3)
	.set(VFPv3D16, ARM.HasVFPv3D16)
	.set(TLS, ARM.HasTLS)
	.set(VFPv4, ARM.HasVFPv4)
	.set(IDIVA, ARM.HasIDIVA)
	.set(IDIVT, ARM.HasIDIVT)
	.set(VFPD32, ARM.HasVFPD32)
	.set(LPAE, ARM.HasLPAE)
	.set(EVTSTRM, ARM.HasEVTSTRM)
	.set(AES, ARM.HasAES)
	.set(PMULL, ARM.HasPMULL)
	.set(SHA1, ARM.HasSHA1)
	.set(SHA2, ARM.HasSHA2)
	.set(CRC32, ARM.HasCRC32)
	return 
}