package arm64

import (
	
	. 
)

type CPU cpuid.CPU

func ( CPU) ( Feature) bool {
	return cpuid.CPU().Has(cpuid.Feature())
}

func ( *CPU) ( Feature,  bool) {
	(*cpuid.CPU)().Set(cpuid.Feature(), )
}

type Feature cpuid.Feature

const (
	FP       Feature = 1 << iota // Floating-point instruction set (always available)
	ASIMD                        // Advanced SIMD (always available)
	EVTSTRM                      // Event stream support
	AES                          // AES hardware implementation
	PMULL                        // Polynomial multiplication instruction set
	SHA1                         // SHA1 hardware implementation
	SHA2                         // SHA2 hardware implementation
	CRC32                        // CRC32 hardware implementation
	ATOMICS                      // Atomic memory operation instruction set
	FPHP                         // Half precision floating-point instruction set
	ASIMDHP                      // Advanced SIMD half precision instruction set
	CPUID                        // CPUID identification scheme registers
	ASIMDRDM                     // Rounding double multiply add/subtract instruction set
	JSCVT                        // Javascript conversion from floating-point to integer
	FCMA                         // Floating-point multiplication and addition of complex numbers
	LRCPC                        // Release Consistent processor consistent support
	DCPOP                        // Persistent memory support
	SHA3                         // SHA3 hardware implementation
	SM3                          // SM3 hardware implementation
	SM4                          // SM4 hardware implementation
	ASIMDDP                      // Advanced SIMD double precision instruction set
	SHA512                       // SHA512 hardware implementation
	SVE                          // Scalable Vector Extensions
	ASIMDFHM                     // Advanced SIMD multiplication FP16 to FP32
)

func () CPU {
	 := CPU(0)
	.set(FP, ARM64.HasFP)
	.set(ASIMD, ARM64.HasASIMD)
	.set(EVTSTRM, ARM64.HasEVTSTRM)
	.set(AES, ARM64.HasAES)
	.set(PMULL, ARM64.HasPMULL)
	.set(SHA1, ARM64.HasSHA1)
	.set(SHA2, ARM64.HasSHA2)
	.set(CRC32, ARM64.HasCRC32)
	.set(ATOMICS, ARM64.HasATOMICS)
	.set(FPHP, ARM64.HasFPHP)
	.set(ASIMDHP, ARM64.HasASIMDHP)
	.set(CPUID, ARM64.HasCPUID)
	.set(ASIMDRDM, ARM64.HasASIMDRDM)
	.set(JSCVT, ARM64.HasJSCVT)
	.set(FCMA, ARM64.HasFCMA)
	.set(LRCPC, ARM64.HasLRCPC)
	.set(DCPOP, ARM64.HasDCPOP)
	.set(SHA3, ARM64.HasSHA3)
	.set(SM3, ARM64.HasSM3)
	.set(SM4, ARM64.HasSM4)
	.set(ASIMDDP, ARM64.HasASIMDDP)
	.set(SHA512, ARM64.HasSHA512)
	.set(SVE, ARM64.HasSVE)
	.set(ASIMDFHM, ARM64.HasASIMDFHM)
	return 
}